中圖分類號：TN47 文獻(xiàn)標(biāo)志碼：A DOI: 10.16157/j.issn.0258-7998.234101
中文引用格式： 孫維東，胡小剛. 基于UVM的異步接口CAN控制器驗證平臺[J]. 電子技術(shù)應(yīng)用，2024，50(1)：35-40.
英文引用格式： Sun Weidong，Hu Xiaogang. UVM based verification platform for CAN controller with asynchronous interface[J]. Application of Electronic Technique，2024，50(1)：35-40.

UVM based verification platform for CAN controller with asynchronous interface

Abstract： For Controller Area Network(CAN) controller with asynchronous interface, a randomized and reusable function verification platform based on Universal Verification Methodology(UVM) is designed and implemented. The platform is built using object-oriented UVM classes. The code is more reusable and the development time is shorter. The introduction of a more randomized incentive accelerates the convergence speed of functional verification, and the random incentive is closer to the actual application of the chip. The automatic comparison mechanism can output the result report in real time, which is convenient for problem debugging.

Key words : IC design verification；universal verification methodology；reusable verification platform；controller area networ