No.58 Research Institute of China Electronics Technology Group Corporation
Abstract： In this paper, a system verification architecture for time-sensitive network (TSN) switch chip, which is based on UVM, automatic comparison and coverage-driven verification thinking, is designed. This architecture adopts the method of classifying and pipelining packets, combined with traffic detection, time slot detection and packets automatic comparison scheme, successfully satisfies the implementation of the TSN system verification method, finally ensures the system verification completion. Chip test results meet commercial requirements, once again demonstrates verification architecture completeness.
Key words : UVM；time-sensitive network；TSN；switch chip；system verification
